;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; Copyright (c) 2001-2002 TIMEX Corporation.
; 
; This document is the property of, and contains information proprietary to
; TIMEX Corporation.  It is to be returned upon request.  Reproduction by any
; means, disclosure, or use of its contents for other than the expressed
; purpose for which it is loaned, without the written consent of TIMEX
; Corporation, is strictly prohibited.
;
; File Name:    HWkbd.h
;
; Module Names: None
;                   
; Purpose:      Keypad specific definitions for m851             
;
; File Change History:
;
;               02/28/2002 RVD - Created HWKBD.h for 851
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

; Please see drawing 851-815808 for system schematic

; PORT ASSIGNMENT TABLE
;
; Keypad 
;   The keypad is defined a three distinct modules, corresponding to the three methods
; of user input: the Ring, the Crown, and the Top Pushers. 
;   The ring consists of the  Clockwise (CW) and counter-clockwise (CCW) switches, 
; only one of which can be activated at a time by turning the RING or CROWN.
;   The Crown (stem) of the watch can be set to three distinct positions: HOME, the normal
; operating position, SET1, the first stop when the stem is pulled, and SET2, the the second 
; stop. The crown can also be momentarily depressed beyond the HOME postion, to light the lamp.
; This position is referred to as EL. In this implementation, the SET2 position is UNUSED.
;   The Top Pushers are the normal momentary depress key switches. These all have a DEPRESSED
; and RELEASED position.
;   The following table lists the key names and their respective port and pin assignments. 

;
; PORT          PIN         SWITCH NAME
; InPortK00     K00         SET2 (UNUSED)
; InPortK00     K01         SET1
; InPortK00     K02         NORMAL (HOME)
; InPortK00     K03         EL
; InPortK00     K04         MODE  / SW_1
; InPortK00     K05         STOP  / SW_2
; InPortK00     K06         START / SW_3
; InPortK10     K10         CW 
; InPortK10     K11         CCW 



;******************************************************************************
; KEYPAD REDEFINITIONS
; The following list redefines the keypad hardware pins in terms of their 
; functionality.
;******************************************************************************

; Keypad Input Ports
HWCrownInPort               EQU     InPortK00
HWRingInPort                EQU     InPortK10
HWTopInPort                 EQU     InPortK00
HWElInPort                  EQU     InPortK00
HWHomeInPort                EQU     InPortK00

; Keypad Interrupt Enable Ports (by Port)
HWCrownInts                 EQU     IntEnableK00
HWRingInts                  EQU     IntEnableK10
HWTopInts                   EQU     IntEnableK00
HWElInts                    EQU     IntEnableK00

; Keypad Interrupt Enable Ports (by Pins)
HWCrownIntSel               EQU     IntSelectionK00
HWRingIntSel                EQU     IntSelectionK10
HWTopIntSel                 EQU     IntSelectionK00
HWElIntSel                  EQU     IntSelectionK00

; Keypad Input Comparison Ports
HWCrownComp                 EQU     InCompK00
HWRingComp                  EQU     InCompK10
HWTopComp                   EQU     InCompK00


; Keypad Factor Flag Ports
HWCrownFactor               EQU     InFlagK0L
HWRingFactor                EQU     InFlagK1
HWTopFactor                 EQU     InFlagK0H
HWElFactor                  EQU     InFlagK0L


; Ring Pullup Resistor Control Port
HWRingPullups               EQU     OutPortR0

; Ring Pullup Output Enable Port
HWRingPullupEnable          EQU     OutPortHighImpedance

; Ring Output enable Bit
bHWRingPullupEnable         EQU     bHZR0L

; Home Pullup Resistor Control Port
HWHomePullup                EQU     OutPortR0

; Home Output  Bit
bHWHomePullup               EQU     bR02

; Home Pulldup Output Enable Port
HWHomePullupEnable          EQU     OutPortHighImpedance

; Home Output enable Bit
bHWHomePullupEnable         EQU     bHZR0L
                            

; Individual Port Interrupt Disables
bHWKBDCrownEnable           EQU     bEK0L           ; K00-K03 interrupt enable register
bHWKBDTopEnable             EQU     bEK0H           ; K04-K07 interrupt enable register
bHWKBDRingEnable            EQU     bEK1            ; K10-K11 interrupt enable register

; Keypad Bit Definitions
bSET2                       EQU     bK00
bSET1                       EQU     bK01
bHOMEPIN                    EQU     bK02
bEL                         EQU     bK03
bMODE                       EQU     bK04
bSTOP                       EQU     bK05
bSTART                      EQU     bK06
                        
bSWITCH_1                   EQU     bMODE
bSWITCH_2                   EQU     bSTOP
bSWITCH_3                   EQU     bSTART

; CW and CCW definitions. Crownset and Turn'n'Pull are defined in the ICB. 
bCW                         EQU     bK10
bCCW                        EQU     bK11
bCWPullup                   EQU     bR00
bCCWPullup                  EQU     bR01


; Factor Flag Redefinitions for Keypad
bRingIntFlag                EQU     bFK1
bCrownIntFlag               EQU     bFK0L
bTopIntFlag                 EQU     bFK0H

;******************************************************************************
; KEYPAD EQUATES
; The following list defines Keypad control and read constants.
;******************************************************************************

; Keypad Interrupt Masks, enable and disable
HW_RING_INTS_ON             EQU     (bCW|bCCW)                  ; Mask to turn all ring interrupts on

HW_RING_INTS_OFF            EQU     @LOW(~HW_RING_INTS_ON)      ; Mask to turn all ring interrupts off

; SET2 BUILD OPTION
        IF (CORESUPPORT_CROWNSET2 == 1)   
HW_CROWN_INTS_ON            EQU     (bEL|bHOMEPIN|bSET1|bSET2)  ; Mask to turn all crown interrupts on
                                                                ; when the crown is NOT at HOME.

HW_CROWN_INTS_ON_HOME       EQU     (bEL|bSET1|bSET2)           ; Mask to turn all crown interrupts on
                                                                ; when the crown is in the HOME position.

; SET1 BUILD OPTION
        ELSE
HW_CROWN_INTS_ON            EQU     (bEL|bHOMEPIN|bSET1)        ; Mask to turn all crown interrupts on
                                                                ; when the crown is NOT at HOME.

HW_CROWN_INTS_ON_HOME       EQU     (bEL|bSET1)                 ; Mask to turn all crown interrupts on
        ENDIF



HW_CROWN_INTS_OFF           EQU     @LOW(~HW_CROWN_INTS_ON)     ; Mask to turn all crown interrupts off


HW_TOP_INTS_ON              EQU     (bSTOP|bSTART|bMODE)        ; Mask to turn all top pusher interrupts on 
HW_TOP_INTS_OFF             EQU     @LOW(~HW_TOP_INTS_ON)       ; Mask to turn all top pusher interrupts off
HW_ALL_TOP_INTS_OFF         EQU     @LOW(~HW_TOP_INTS_ON)       ; Mask to turn all top pusher interrupts off


; Keypad Read Parameters
; SET2 BUILD OPTION
        IF (CORESUPPORT_CROWNSET2 == 1)   
HWCROWNMASK                 EQU     (bEL|bHOMEPIN|bSET1|bSET2)  ; Mask to read all crown inputs

; SET1 BUILD OPTION
        ELSE
HWCROWNMASK                 EQU     (bEL|bHOMEPIN|bSET1)        ; Mask to read all crown inputs
        ENDIF

HWELMASK                    EQU     bEL                         ; Mask to read EL bit only inputs

HWTOPMASK                   EQU     (bSTART|bSTOP|bMODE)        ; Mask to read all top pusher inputs

HWALLTOPRELEASED            EQU     HWTOPMASK                   ; Release mask for top pusher inputs

HWRINGMASK                  EQU     (bCW|bCCW)                  ; Mask to read all ring inputs


;******************************************************************************
; MISCELLANEOUS KEYPAD EQUATES
; The following list defines miscellaneous Keypad constants.
;******************************************************************************

; Crown error tracking definition of the HOME position
bHOME                       EQU     1000B

; Maximum time the RING can be stuck in the HIGH position before enabling
; Ring Free Tracking. All numbers in seconds.
RINGSTUCKCOUNTDONE          EQU     00
RINGSTUCKCOUNT              EQU     05

; Number of times the top pushers are read for proper debouncing
HWDEBOUNCEREADS             EQU     04

; Number of times the top pushers are read for proper debouncing with HSO ON
HWDEBOUNCEREADSWITHHSO      EQU     HWDEBOUNCEREADS * 2

; Delay count between debounce reads when HSO is off.
HWTOPDEBOUNCEDEALYNOHSO     EQU     01

; Delay count between debounce reads when HSO is on.
HWTOPDEBOUNCEDEALYWITHHSO   EQU     255

; Number of times the Ring is read for proper debouncing with HSO off
HWRINGDEBOUNCEREADSNOHSO    EQU     01

; Number of times the Crown is read for proper debouncing with HSO off
HWCROWNDEBOUNCEREADSNOHSO   EQU     01

;Define all output ports Low constant for HWRingPulldowns port 
ALLOUTSLOW                  EQU     00

; No Pulses, ie, ring not turned, pulse count is Zero
NOPULSES                    EQU     00

; Ring Tracking Maximum Timeout (1Hz basis).
; No EDGE_TRAILING event will be sent if the time between leading and trailing edges exceeds
; this value.  
RINGMAXPULSEWIDTH           EQU     03

; Number of times the Pull ups must be held high for with HSO off
HWPULLUPHOLDNOHSO           EQU     01

; Counter value for HWKBDELDepIgnoreCounter to acheive a 500mS delay at a 32Hz decrement rate
HWKBD_EL_DEP_IGNORE_COUNT	EQU		32/2

; OSC3 Frequency dependent Counts
; Number of times the Ring is read for proper debouncing - 2mS, long bond option
HWRINGDEBOUNCEREADS_4_9152MHz   EQU     192
HWRINGDEBOUNCEREADS_3_072MHz    EQU     120
HWRINGDEBOUNCEREADS_2_4576MHz   EQU     96
HWRINGDEBOUNCEREADS_1_8432MHz   EQU     73
HWRINGDEBOUNCEREADS_1_2288MHz   EQU     48
HWRINGDEBOUNCEREADS_6144KHz     EQU     24

; Number of times the Ring is read for proper debouncing - 1mS, short bond option
HWRINGDEBOUNCEREADS_SHORT_4_9152MHz     EQU     HWRINGDEBOUNCEREADS_4_9152MHz/2
HWRINGDEBOUNCEREADS_SHORT_3_072MHz      EQU     HWRINGDEBOUNCEREADS_3_072MHz/2
HWRINGDEBOUNCEREADS_SHORT_2_4576MHz     EQU     HWRINGDEBOUNCEREADS_2_4576MHz/2
HWRINGDEBOUNCEREADS_SHORT_1_8432MHz     EQU     HWRINGDEBOUNCEREADS_1_8432MHz/2
HWRINGDEBOUNCEREADS_SHORT_1_2288MHz     EQU     HWRINGDEBOUNCEREADS_1_2288MHz/2
HWRINGDEBOUNCEREADS_SHORT_6144KHz       EQU     HWRINGDEBOUNCEREADS_6144KHz/2

; Delay Loop counter initialization values 
; Dictates time that software must wait before input port 
; data is valid after the external pull-up 
; has been connected.
; The inital value at HWPULLUPHOLD_1_8432MHz was determined empirically using a 220KOhm resistor
; on the pin, with the E0C88 emulator. The rest were calculated from this value, and tested for
; functioning.
HWPULLUPHOLD_4_9152MHz      EQU     160
HWPULLUPHOLD_3_072MHz       EQU     100
HWPULLUPHOLD_2_4576MHz      EQU     80
HWPULLUPHOLD_1_8432MHz      EQU     60
HWPULLUPHOLD_1_2288MHz      EQU     40
HWPULLUPHOLD_6144KHz        EQU     20

; Set values based on OSC3 speed
HWRINGDEBOUNCEREADS         EQU     HWRINGDEBOUNCEREADS_2_4576MHz
HWRINGDEBOUNCEREADSSHORT    EQU     HWRINGDEBOUNCEREADS_SHORT_2_4576MHz
HWPULLUPHOLD                EQU     HWPULLUPHOLD_2_4576MHz

;******************************************************************************
; KEYPAD EVENT DEFINITIONS
; The following list defines Keypad events that are passed to the core.
; Release events all have the most significant bit set.
;******************************************************************************

; Keyboard to Core events

; "Depressions"
HW_EL_DEPRESS               EQU     00H
HW_CROWN_HOME               EQU     01H
HW_CROWN_SET1               EQU     02H
HW_CROWN_SET2               EQU     03H ;Unused
HW_RING_CW_EDGE_LEADING     EQU     04H
HW_RING_CCW_EDGE_LEADING    EQU     05H
HW_SW1_DEPRESS              EQU     06H
HW_SW2_DEPRESS              EQU     07H
HW_SW3_DEPRESS              EQU     08H

; "Releases"
HW_EL_RELEASE               EQU     80H
HW_RING_CW_EDGE_TRAILING    EQU     84H
HW_RING_CCW_EDGE_TRAILING   EQU     85H
HW_SW1_RELEASE              EQU     86H
HW_SW2_RELEASE              EQU     87H
HW_SW3_RELEASE              EQU     88H

; Converts a depression event to a release event by setting the most significant bit.
HW_RELEASE_MASK             EQU     80H  


; RING Condition Definitions
; These definitions depend on whether the watch uses a crown at Vss or Vdd.
; The 851 has the crown at Vss, so all resistors are pullups. A depression corresponds to 
; a logic level LOW and a release corresponds to a logic level HIGH.

HWPULSELEADING              EQU     0       ; Pulse leading edge. Corresponds to a key
                                            ; depression, ie, ratchet spring making 
                                            ; contact with the CW or CCW contact plate.

HWPULSETRAILING             EQU     1       ; Pulse trailing edge. Corresponds to a key 
                                            ; release, ie, ratchet spring breaking 
                                            ; contact with the CW or CCW contact plate.

HWRINGSTUCK                 EQU     0       ; Ring is "stuck", ie, ratchet spring is in 
                                            ; contact with the CW or CCW contact plate.

HWCWDIRECTION               EQU     1       ; Arbitrary definition. CCWDIRECTION is the 
                                            ; opposite.